MTS/Sr. MTS Engineer – Discrete Power FET Technology Development

onsemi is a leading innovator in semiconductor technology, dedicated to advancing power electronics through cutting‑edge research and development. We are seeking a talented and motivated Member of Technical Staff (MTS) or Senior Member of Technical Staff (SMTS) Engineer to join our team and drive the development of next‑generation discrete power FET technologies. This role offers high technical ownership, cross‑functional visibility, and the opportunity to directly shape onsemi’s future power device roadmap.

Responsibilities

• Lead technology development for onsemi’s advanced nodes of discrete power FETs, owning device architecture from concept definition through qualification and high‑volume manufacturing.
• Define electrical targets and device structures, collaborating with design, process integration, and modeling teams to optimize Rds(on), switching performance, ruggedness, and power density.
• Conduct or direct TCAD, electro‑thermal, and compact modeling simulations to predict performance, parasitics, and reliability behavior.
• Partner with process module owners in the fab to optimize process windows, ensure device robustness, and resolve integration challenges.
• Perform device characterization, electrical testing, and failure analysis, ensuring compliance with specifications and customer requirements.
• Drive structured root‑cause analysis (DOE, 6‑sigma, SPC, FMEA) for yield, reliability, or device‑related issues, and implement sustainable corrective actions.
• Collaborate with systems engineering, product engineering, packaging, and applications teams to integrate power FETs into system‑level solutions and end‑customer applications.
• Monitor industry trends and emerging device concepts in power MOSFET, superjunction, and wide‑bandgap (SiC/GaN) technologies.
• Generate invention disclosures, patents, and technical reports to strengthen onsemi’s IP portfolio and documentation standards.
• Provide technical guidance, coaching, and mentorship to junior engineers; matrix‑manage engineers across multiple organizations.
• Present technical content in executive‑level reviews and represent the team in cross‑functional and customer‑facing discussions.
• Report directly to the Sr. Director of Technology Development

Qualifications

• PhD, Master’s, or Bachelor's degree in Electrical Engineering, Materials Science, Electrical Engineering, Physics, or a related field.
• Proven experience in semiconductor device design and development, specifically with discrete power FETs (trench MOSFETs, superjunction, or related structures).
• Experience with post wafer fab operations such as Back-Grind/Back Metallization, Packaging, Dicing and Singulation, module construction.
• Experience with wafer level testing, ILT/WAT/PCM and Probe. Familiarity with package level Final Testing especially for discrete power devices
• Experience taking technologies from development stage, through optimization and qualification and into volume ramp.
• Strong understanding of semiconductor physics, device reliability, and fabrication processes, including experience in 300mm fabrication.
• Demonstrated ability to translate high‑level objectives into actionable engineering plans and drive projects independently.
• Strong data‑driven problem‑solving skills using DOE, statistical analysis, SPC, 6‑sigma, and FMEA methodologies.
• Proficiency with TCAD, SPICE, and relevant simulation tools; experience in electro‑thermal and parasitic modeling preferred.
• Track record of leading or significantly contributing to technology development projects with measurable impact on performance, reliability, yield, or cost.
• Excellent communication skills with the ability to present complex technical topics clearly to both engineering and executive audiences.
• Ability to manage multiple projects simultaneously in a fast‑paced development environment

Preferred Skills

• Experience with high‑voltage and high‑current power device applications.
• Knowledge of automotive AEC‑Q101 reliability testing, including HTGB, HTRB, power cycling, UIS, SOA, and mission‑profile testing.
• Familiarity with wide‑bandgap (SiC/GaN) devices, electro‑thermal coupling, ruggedness physics, and advanced packaging (DFN, TO‑leadframe, copper clip, modules).
• Hands‑on experience with design rules, device layout, and design environments.
• Strong background in statistical analysis and data tools (JMP, Python, MATLAB).
• Understanding of industry standards, safety, and regulatory requirements for power electronics

Salary

onsemi is excited to share the base salary range for this position is $147,000 to $250,000 exclusive of fringe benefits or potential bonuses. The final pay rate for the successful candidate will depend on geographic location, skills, education, experience, and/or consideration of internal equity of our current team members. We also offer a competitive benefits package. https://www.onsemi.com/site/pdf/Benefits-Summary-USA.pdf